Hi Malte,
my bad. I just mixed something up in the results. Everything works as expected.
Sorry for the noise...

Hi Jendrik,

I cannot reproduce this -- are you sure you're using r3629 and you recompiled
(and reran) the preprocessor? The attached output.sas works fine for me with the
current version of the fluent-merging branch and option "y" or "c". (It doesn't
work with "u", but that's to be expected, since LM-Cut generally doesn't support
conditional effects.)

I have found another example for an output.sas file that can be solved by h_ff
but not by h_cea or h_lmc. I am posting the dump output here and appending the
sas file to the report.

DUMP miconic-simpleadl-s1-0.pddl (The problem occurs for the first problem of
miconic-fulladl as well though)

Task output
Variables:
  var0 in {lift-at(f0), lift-at(f1)}
  var1ANDvar2 in {boarded(p0)ANDserved(p0), boarded(p0)ANDnot-served(p0),
not-boarded(p0)ANDserved(p0), not-boarded(p0)ANDnot-served(p0), served(p0)}

Init:
  I(var0) = lift-at(f0)
  I(var1ANDvar2) = not-boarded(p0)ANDnot-served(p0)

Goals:
  var1ANDvar2 = served(p0)

6 Operators:
Pseudo Op [boarded(p0)ANDserved(p0) -> served(p0)]
  PRE: var1ANDvar2 = boarded(p0)ANDserved(p0)
  EFF:  -> var1ANDvar2 := served(p0)

Pseudo Op [not-boarded(p0)ANDserved(p0) -> served(p0)]
  PRE: var1ANDvar2 = not-boarded(p0)ANDserved(p0)
  EFF:  -> var1ANDvar2 := served(p0)

down f1 f0
  PRE: var0 = lift-at(f1)
  EFF:  -> var0 := lift-at(f0)

stop f0
  PRE: var0 = lift-at(f0)
  EFF: boarded(p0)ANDserved(p0) -> var1ANDvar2 := not-boarded(p0)ANDserved(p0)
  EFF: boarded(p0)ANDnot-served(p0) -> var1ANDvar2 := not-boarded(p0)ANDserved(p0)

stop f1
  PRE: var0 = lift-at(f1)
  EFF: not-boarded(p0)ANDnot-served(p0) -> var1ANDvar2 :=
boarded(p0)ANDnot-served(p0)

up f0 f1
  PRE: var0 = lift-at(f0)
  EFF:  -> var0 := lift-at(f1)

Fix committed to the emil branch and to trunk in r3629.

I reran the preprocessor on the ALL_PLUS suite (which is a superset of the ALL
suite) and found that the fix affected the following domains:

 * miconic-fulladl
 * miconic-simpleadl
 * movie
 * psr-large
 * psr-middle
 * satellite
 * schedule
 * storage

In the first six of these, the only difference is that the preprocessor now
omits some redundant arc conditions on certain DTG arcs stemming from
conditional effects. Specifically, in the DTG for var x, transitions starting at
value foo could sometimes have "x = foo" as an arc condition. This is of course
clearly redundant, and such arc conditions are now no longer generated.

This change may lead to some small performance improvements for the h_cea
heuristic, but I don't think any experiments desperately need to be re-run
because of that. Wouldn't hurt though. I don't think this should affect LAMA's
landmark generation because I don't think it looks at the conditions of the DTG
arcs. Silvia, correct me if I'm wrong. I don't think this should affect h_CG
because it only considers arc conditions on lower-level variables.

Altogether, 363900 redundant arc conditions were removed in these domains.

In Schedule and Storage, changes were more significant. In Schedule, there were
26466 bogus DTG transitions with unsatisfiable conditions like "x = a AND x = b"
for the same variable x and different values a, b. These conditions were wrong,
and have now been replaced with the correct (satisfiable) arc conditions.

In Storage, there were 588253 bogus DTG transitions included in the output which
shouldn't have been there. These were all transitions for var x from value foo
that included a condition "x = bar" for some bar != foo, which is of course not
satisfiable. The corrected preprocessor no longer includes these transitions.

I'd recommend rerunning all experiments involving h_CG and h_cea on Schedule and
all experiments involving h_cea on Storage. I don't know how these changes
affect LAMA's landmark generation method, so maybe rerun those too to be on the
safe side. (Of course, first update, make and rerun the preprocessor. Be sure
not to rerun the preprocessor while any experiments are running.)

Fix committed to Jendrik's branch in r3622.

This should be merged to the trunk and to the emil branch, but before we do
this, it'd be great if someone else could have a look at my fix to see if it
makes sense ("svn diff -c 3622 svn+ssh://downward" should show the diff).

The preprocessor can generate wrong DTGs in domains with conditional effects. 

This only happens when an operator contains several effects that set the same
variable to the same value, so it probably affects few (if any) benchmark
domains. However, in the domains in which it happens, it can have a very adverse
effect on h_cg and h_cea, and probably also on LAMA's DTG-based landmark
generation. I think these are the only planner configurations that use the DTGs,
so the others should not be affected.